Lab Title	Advanced Silicon Device and Process Lab.
Research Direction	His research includes SiGe/GeSn epi, Si/GeSi/GeSn/oxide semiconductor nanosheet transistor stacking for beyond 1 nm nodes, thermal analysis from transistor to package, SRAM/MIM/FTJ/FeFET/MTJ/SOT/DRAM, Si photonics/CPO, and mm wave nanosheets. He demonstrates the tallest transistor (8/16/24 stacked channels), the record high 2,400,000 cm2/Vs electron mobility in strained Si, the first Si-capped SiGe/Ge channels with 3x mobility enhancement (in 5nm/3nm node production now), the first CVD GeSn outperforming MBE in terms of hole mobility, the first stacked GeSn/GeSi channel GAA(nanosheet/nanowire) transistors, first CFET (complementary FET) with junction isolation, 3 tier transistor stacking and the first Si/SiGe/SiC MIS LED/photodetectors. He also invented the tree/E FETs beyond Stacked GAA. He has 782+ papers (293+ journal papers, 38 IEDM, 24 VLSI), 115 US patents, 31 China patents, 85 Taiwan ROC patents, more than 10841+ citations with h-index=48, 54 Ph.D. graduates, and 185 master graduates. His students have received 294 Awards since 1999 including 13 TSIA PhD awards and 14 tsmc PhD awards (Link). He has 6 graduate students as professors (2 NTU, 1 NCHU, 1 NDHU, 1 NJUST, 1 FZU), and 3 postdocs as professors (1 NTU, 1 NCU, 1 CGU). Currently, he is advising 24 PhD students and 31 masters.
Facility	EL/PL measurement system epi CVD HK/MG ALD
Extension Number	+886-2-33663700 ext.515
Reference URL	https://cc.ee.ntu.edu.tw/~cliu/