光電所所訊

A 3D electrode design for fast-response VA-FFS liquid crystal mode

Professor Wing-Kit Choi

Graduate Institute of Photonics and Optoelectronics, National Taiwan University

臺灣大學光電所蔡永傑教授

In this work, a 3D electrode design is proposed [1] for a Vertically-Aligned Fringe-Field Switching (VA-FFS or Dual-FFS) liquid crystal mode which is known for its intrinsic sub-millisecond fast response time without using thin cell gap or other liquid crystal phases. Compared to the previously proposed 2D electrode designs [2-3], we found that, by using this new 3D electrode design, it is possible to improve the potential maximum transmission due to reduced disclination lines or deadzones (without using a double-sided electrode structure) and also to improve the potential response speed due to smaller effective domain size of liquid crystals. A major mechanism for causing such a fast response time is due to the formation of self-imposed boundaries [3] (or so-called virtual walls) which can be viewed as liquid crystals having very small “effective” cell gap. This proposed approach of achieving fast response time in liquid crystals can be very attractive since it doesn’t require more complicated liquid crystal phases (or materials) such as Blue Phase or SmC* Ferroelectrics. This approach may simply use standard nematic liquid crystal phase or materials such as E7. Moreover, this approach doesn’t require the use of very thin cell gap (e.g. 2μm or below) which is less practical for large area fabrication. This proposed technique of achieving fast response time in liquid crystals can therefore be attractive for the future development of fast response liquid crystal displays, intensity or phase modulators.

[1] Wing-Kit Choi, Chia-Hsiang Tung and Bo-Kai Tseng, “Fast Response VA-FFS Liquid Crystal Mode using 3D electrode design”, SID 2017 Digest, pp.1838-1840, May 2017

[2] M. Jiao, Z. Ge, S. T. Wu, and W. K. Choi, “Sub-millisecond response liquid crystal modulators using dual field switching in a vertically aligned cell,” Appl. Phys. Lett., 92, 111101, Mar. 2008

[3] W.K. Choi & S.T. Wu, “Fast response liquid crystal mode,” US Patent 7298445 B1, Nov. 2007

Fig. 1 shows electrode design and molecular orientation of 2D VA-FFS (left) and the new 3D VA-FFS (right) at voltage-on state.

Fig. 2 shows the top-view transmission of 2D VA-FFS (left) and 3D VA-FFS (right). The figure on the right shows that disclination lines (or deadzones) are indeed reduced along the transverse (or y) direction in the 3D VA-FFS.

Fig. 3 shows the improvement of the transmission (figure on left, with circular polarizer) and also improvement of response speed (Table on right) of 3D VA-FFS compared to 2D VA-FFS liquid crystal mode.

Threshold Voltage Improvement Through Sidewall Control of InGaAs Fin-structured High Electron Mobility Transistors (Fin-HEMTs)

Professor Chao-Hsin Wu’s laboratory

Graduate Institute of Photonics and Optoelectronics, National Taiwan University

臺灣大學光電所吳肇欣教授

The fabrication process was started with fin formation by inductively coupled plasma dry etch. The source and drain metal were deposited by e-beam evaporator and followed by rapid thermal annealing to form Ohmic contacts. Then, the recess region was etched by diluted sulfuric acid followed by self-aligned gate metal of Ni/Au. Fin widths were finally defined by recess etch and varied from 396 to 54 nm. The schematic cross section and structure are shown in Fig. 1.

Figure 2 shows I_D-V_G characteristics of FinHEMTs with different fin widths (W_fin). Threshold voltage (V_T) shifts toward positive direction from -1.41 V to 0.56 V as W_fin decreases. It can be observed that compared to planar devices, V_T of Fin-HEMT moves to +V_G as W_fin decreases. As W_fin is reduced down to about 90 nm, the device starts to work at enhancement mode operation. The mechanism is proposed in Fig.3. When V_G decreases from V_G1 (large) to V_G2 (smaller), top gate still cannot turn off the channel. So the planar devices are still at on-state operation. On the other hand, for fin-shaped devices, though top gate is not capable of turning off the channel, the depletion region from surface of sidewalls is large enough to fully deplete the channel.

Fig. 1. Process flow, schematic cross section and device structure of InGaAs Fin-HEMT

Fig. 2. Transfer characteristics of InGaAs FinHEMTs with different fin width at V_D = 1.9 V

Fig. 3. Schematic mechanism of top gate and sidewall gates proposed in this work