光電所所訊

Virtual Channels for Flowing Magnetic Beads

Professor Jui-che Tsai

Graduate Institute of Photonics and Optoelectronics, National Taiwan University

臺灣大學光電所蔡睿哲教授

We have demonstrated the feasibility of a novel microfluidic system with virtual channels formed by ‘walls’ of magnetic fields, including collecting channels, transporting channels and function channels. The channels are defined by the nickel patterns. With its own ferromagnetism, nickel can be magnetized using an external magnetic field; the nickel structures then generate magnetic fields that can either guide or trap magnetic beads. A glass substrate is sandwiched between the liquid containing magnetic beads and the chip with nickel structures, preventing the liquid from directly contacting the nickel (Fig. 1). Collecting channels with different shapes are compared (Fig. 2). Moreover, we demonstrate I-, S- and Y-shaped transporting channels can steer magnetic beads smoothly. Also, a switchable trapping channel implemented with a bistable mechanism can perform the passing and blocking of a magnetic bead.

Figure 1

Figure 2

S. H. Tang, H. W. Chiang, M. C. Hsieh, Y. D. Chang, P. F. Yeh, W. Y. Shieh, and J. C. Tsai, “An approach to implement virtual channels for flowing magnetic beads,” Journal of Micromechanics and Microengineering, vol. 24, no. 7, 075016, July 2014.

Gate-Bias Stress Stability of P-Type SnO Thin-Film Transistors Fabricated by RF-Sputtering

Professor I-Chun Cheng

Graduate Institute of Photonics and Optoelectronics, National Taiwan University

臺灣大學光電所陳奕君教授

Inverted-staggered bottom-gate rf-sputtered p-type SnO thin-film transistors (TFTs) with an atomic layer deposited HfO₂ gate dielectric were demonstrated on glass substrates, and the gate-bias stress stability of these TFTs was investigated. The SnO TFT exhibits a threshold voltage of 2.5 V, a field-effect hole mobility of 0.24 cm²V⁻¹s⁻¹, a sub-threshold swing of 2 V/decade, and an ON/OFF current ratio of 10³. Under gate-bias stress, the transfer characteristics shift with the same polarity as the stress voltage, whereas the sub-threshold swing and field-effect mobility remain almost unaltered. The threshold voltage shifts under various gate-bias stress voltages are well fitted by the stretch-exponential equation. The characteristic trapping time of carriers increases from 1.2 × 10⁴ s to 6.8 × 10⁵ s when the gate-bias stress voltage changes from −12.5 V to −5 V and increases from 1.3 × 10³ s to 4.7 × 10⁴ s when the gate-bias stress voltage decreases from 12.5 V to 5 V. This indicates that the dominant mechanism of the threshold voltage shift is the charge trapping at the interface between the active layer and the gate dielectric or at the gate dielectric near the interface. Larger amounts of threshold voltage shifts observed in the positive gate-bias stress may be caused by the bias-induced adsorption of oxygen on the unpassivated backchannel surface in addition to charge trapping.

Figure 1 (a) Transfer and (b) output characteristics of inverted-staggered bottom-gate SnO TFT.

Figure 2 (a) Transfer characteristics of SnO TFTs at various gate-bias stress times. (b) Threshold voltage shift (Vth) as a function of gate-bias stress time under various gate-bias stress voltages at both polarities.

Ref: I-Chung Chiu and I-Chun Cheng, “Gate-bias stress stability of p-type SnO thin-film transistors fabricated by rf-sputtering,” IEEE Electron Device Letters, vol. 35, pp. 90-92, 2014